• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
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  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    Bipolar P-i-N diodes have first and second regions 1, 5 with opposite conductivity types and intermediate drift regions 3 present between these regions. A trenched field relief region 14 is configured to deplete the intermediate drift region 3 when the diode is reverse biased, thereby allowing a higher doping level 12 for the given breakdown voltage to result in the intermediate drift region 3. To be used for. This improves the turn on and turn off characteristics of the diode.
    公开号:KR20020092415A
    申请号:KR1020027013181
    申请日:2002-01-25
    公开日:2002-12-11
    发明作者:후앙에디
    申请人:코닌클리즈케 필립스 일렉트로닉스 엔.브이.；
    IPC主号:
    专利说明:

    Semiconductor Diodes {BIPOLAR DIODE WITH A TRENCH GATE}
    [2] P-i-N rectifiers are well known for power circuit applications. The intermediate drift region (i-region) is sandwiched between the strongly doped p and n regions of the junction diode. This intermediate drift region has a lower doping concentration than the p or n region. During the forward conduction, the i-region is filled with minority carriers, which makes the resistance of the region very small, allowing the diode to carry a high current density during the forward conduction. Useful descriptions of such devices are included in the test book “Power Semiconductor devices” by B. Jayant Baliga, in particular section 4.2 pages 153-182, published in “PWS Publishing Company, Boston in 1995”.
    [3] With the appropriate choice of parameters of the i-region, in particular thickness and dopant concentration, it is possible to develop rectifiers with very high breakdown voltages.
    [4] An important disadvantage of the P-i-N is that it is necessary to inject a high concentration of minority carriers into the i-region for the challenge. This causes two problems. First, when the diode is turned on, the diode has a very high resistance until minority carriers are injected into the i-region. Thus, a high current flows across the resistive region during turn on, which causes a large voltage drop across the diode.
    [5] Second, during turn off, minority carrier charges stored in the i-region must be removed. This requires a significant reverse time, a large reverse current with a negative voltage overshoot. As the switching speed of the diode or rectifier increases, the phenomena get worse. In particular, it is advantageous to reduce the reverse recovery time.
    [6] It has been found that faster reverse recovery can be obtained when the carrier life in the i-region is reduced. Thus, a common method of increasing the rate of reverse recovery is to include gold or platinum recombination centers in the i-region. This is known as gold or platinum "killing" and is known to greatly improve reverse recovery time.
    [7] Unfortunately, gold or platinum-killed diodes have a high temperature dependence of switching operation because minority carrier lifetimes increase rapidly with temperature when controlled by deep recombination centers such as gold and platinum. In addition, the carrier distribution in the strongly gold or platinum doped i-regions is not uniform across the thickness of the i-region. This is because the recombination reduces the carrier density in the middle of the i-region due to the short carrier life. This U-shaped carrier distribution causes non-soft recovery and ringing, because higher carrier densities at the edges of the i-regions can result in snap-off and This is because it takes longer to fall to zero than the central region which suddenly depletes during the application of a blocking voltage which causes a sharp attenuation of the current causing ringing.
    [8] Thus, there is a need to improve the performance of P-i-N diode structures for fast-switching high power applications.
    [9] Summary of the Invention
    [10] According to the present invention, a semiconductor diode is provided, wherein the semiconductor diode comprises a first doped region of a first conductivity type and an intermediate drift region of the first conductivity type doped with a dopant concentration less than a dopant concentration within the first region. And a second doped region having a conductivity type opposite to the first conductivity type and sandwiching the intermediate drift region together with the first region—the second doped region is the intermediate drift region and the first region. And a plurality of field electrodes depleting the intermediate drift region under a reverse bias, wherein the plurality of field electrodes extend transversely across the semiconductor diode and the second region and the intermediate region. Multiple closely spaced isolation trenches extending through the region configured within insulated trenches.
    [11] As will be described below, the use of such structures allows for greatly improved recovery times.
    [12] For certain dopant concentrations for the intermediate drift region, the use of field electrodes increases the breakdown voltage which can be obtained differently under reverse bias, because of the two types of conductivity types that surround the trench and oppose each other of the bipolar diode in this situation. This is because the depletion layer between the regions extends to deplete the entire intermediate region. Under forward bias, the depletion layer is reduced to allow conduction through the diode structure.
    [13] More importantly, however, the use of the structure according to the invention allows for a higher doping concentration than the usual doping concentration of the intermediate drift region for any desired blocking voltage. This doping concentration may be on the same order of magnitude as the minority carrier density injected into the intermediate drift region. Thus, the intermediate drift region will have a dopant concentration of 10 15 cm −3 to 10 17 cm −3 .
    [14] By doping the intermediate drift region to a higher doping concentration, it is possible to reduce the charge storage in the drift region during forward conduction, because the large amount of charge required to carry the current is obtained by implantation by minority carriers rather than by the dopant in the region. Because it is obtained from an atom This reduces the level of injected charge required for a given current. This increases the rate of reverse recovery without requiring life killer centers such as gold and platinum doping. Thus, disadvantages such as the inflexibility recovery associated with such doping and the high temperature dependence of the switching features can be reduced or eliminated.
    [15] Also, doping to higher concentrations results in lower transient voltage drops during turn on. During turn on, the voltage drop across the conventional P-i-N diode is typically greater than in steady-state, because the injected charge distribution has not yet been fully established in the middle region. The higher doping levels allowed by the present invention lower the pre-modulation resistance and reduce voltage overshoot. This effect adds to the reduced reverse recovery time. Thus, the present invention yields advantageous results during both turn on and turn off periods.
    [16] The degree of improvement in recovery time will vary with a number of factors, such as the distance between trenches.
    [17] The closer the trenches are spaced apart, the greater the degree of improvement, but as a compromise, a larger silicon area will be used for the trench.
    [18] Thus, one of ordinary skill in the art would choose to allow the distance between trenches to be sufficiently closely spaced to improve recovery time without consuming too much area. In general, the spacing between trenches will be less than 10 μm.
    [19] There may be no life killer in the intermediate drift region. Alternatively, there may be a reduced density life killer compared to prior art diodes. In this way, the temperature dependence of the diode characteristics can be reduced.
    [20] Similar structures in the field region are used in Schottky diode structures, as described, for example, in US 4,646,115 (Philips reference number PHB33047). In the structure described in this document, field relief regions are provided to improve the breakdown voltage of the main junction to a value higher than possible in the absence of the field relief region. This allows the use of an epilayer doped (and possibly thinner) higher than normally allowed for a particular Schottky breakdown voltage. This is particularly advantageous in unipolar devices, since the doping concentration and thickness of the epi layer has a significant effect on the on-state voltage drop, which can be reduced accordingly. As will be appreciated by those skilled in the art, the ability to use a higher doping level than would normally be allowed for a given blocking voltage has little effect on the on-state voltage drop of the bipolar P-N diode. Thus, the advantages of the field area to be obtained in a Schottky device could be obtained little or no in a bipolar device, so as far as the inventors know, the field relief area is not used on bipolar diode structures.
    [21] In the P-N diode according to the present invention, the second doped region and the intermediate drift region may be formed of an epitaxial layer (epitaxial layer) deposited on the substrate. The first doped region can likewise be an epi layer, or alternatively can be composed of a doped substrate. The trench preferably extends into the first doped region.
    [22] The field electrode of the trench may be polycrystalline silicon (polysilicon) doped with the same conductivity type as the conductivity type of the second doped region.
    [23] The first doped region may be a heavily doped n + layer, the intermediate drift region may be n layers and the second doped region may be a p layer.
    [24] The field electrode can be any suitable conductor, such as doped polysilicon.
    [25] The insulating trench and the field electrode can form a grid extending across the semiconductor device.
    [26] An upper metal wiring extending across the semiconductor diode is provided to contact the field electrode and the second doped region. Lower contact metallization is constructed on the surface of the semiconductor diode opposite the upper metallization, providing electrical connection to the first doped region.
    [27] In an embodiment, the first doped region and the intermediate drift region may be formed of a first semiconductor material and the second doped region may be a thin region formed of a second semiconductor material having a lower bandgap than the first semiconductor material. Can be. The degree of lattice mismatch of the first and second semiconductor materials and the thickness of the thin second region may be selected such that the level of mechanical stress remains below the level at which misfit dislocations are formed. By using the structure, the required doping level in the intermediate drift region can be higher than without using the structure for a given blocking voltage, which improves the characteristics of the diode as described above.
    [28] Preferably, the product of the thickness of the thin second region and the relative deviation of the lattice constants of the first and second semiconductor materials does not exceed 30 nm to prevent excessive inappropriate dislocation.
    [29] Specific embodiments of the present invention will be described purely and illustratively with reference to the accompanying drawings.
    [1] The present invention relates to a P-N diode suitable for use as a rectifier and a method of manufacturing the same. In particular, the present invention provides a fast bipolar P-N diode of the type, i.e., P-i-N type, having an intermediate drift region.
    [30] 1 is a diagram of a manufacturing process step of a diode according to the invention,
    [31] 2 is a plan view of the embodiment of FIG.
    [32] 3 is a cross-sectional view of a portion of the device of FIG. 1 in use;
    [33] 4 is a sectional view of a second embodiment of a diode according to the invention;
    [34] A pn semiconductor rectifier diode according to a particular embodiment of the invention is formed on an n + single crystal silicon substrate 1. On top of this substrate, an n-type silicon epi layer 3 is grown, which is doped at a concentration of 1 * 10 15 to 1 * 10 17 cm -3 and has a thickness of 5 m to 40 m. The p-type silicon epitaxial layer 5 grows on the n epitaxial layer 3. The final structure produced by this process is shown in Figure 1a.
    [35] Next, a number of closely spaced trenches 7 spaced below 10 μm are etched through the p epi layer and n epi layers 3, 5, preferably to the substrate. The trenches are formed by patterning the photoresist and dry etching the trenches in a conventional manner. 2 is a plan view of the arrangement of the trench 7. As shown, the trench 7 divides the semiconductor substrate 1 and divides the epi layers 3, 5 into a plurality of mesas 6.
    [36] The trenches 7 are arranged closely enough, generally at a distance of 10 μm or less, thereby depleting the entire intermediate region 3 when the final diode is biased in the reverse direction.
    [37] Next, an insulating oxide layer 11 is grown on the inner side of the trench 7. The final structure thus produced is shown in FIG. 1B.
    [38] Next, polysilicon 13 is deposited using low pressure chemical vapor deposition (LPCVD), thereby filling the trench 7. The polysilicon may be already doped and subsequently deposited, or may be deposited and then doped. The final structure thus produced is shown in FIG. 1C.
    [39] Next, dry etching is used to planarize the polysilicon 13, and the polysilicon is etched back to the top of the trench. The remaining polysilicon 13 forms a plurality of field electrodes 14. Next, a metal layer 15 serving as a contact is deposited on top of the polysilicon 13 and on top of the p-type epi layer 5. Contact metal wiring 23 is similarly applied to the bottom of the substrate 1.
    [40] The operation of the diode functioning as a rectifier will be described with reference to FIG. Regions 1, 3 and 5 are not distinguished by hatching in FIG. 3 for clarity of drawing.
    [41] When the diode is biased in the forward direction, carriers are injected from regions 1 and 5 into the intermediate region 3 and the carrier density is increased over the dopant concentration 12. The higher doping level 12 of the intermediate region 3 as compared to conventional PiN diodes allows ionization of the dopant atoms at a rate such that the carriers in the intermediate region 3 during the conduction may vary but are typically of the same order of magnitude. And by injection. For example, the injected charge density can be 10 17 cm -3 .
    [42] When the diode is reverse biased, the go well region extends from the p-n junction 17 and the trench 7 to the boundary 21 in the heavily doped substrate 1 across the intermediate region 3. This occurs because the trenches 7 are sufficiently closely spaced. The depletion region expansion from the trench 7 due to the presence of the field relief electrode 14 has a higher doping level 12 than is possible in the absence of such an expansion of the depletion region for a given blocking voltage. It can be used for the area 3. As such, higher doping levels 12 reduce the level of minority carrier injection required for a given current density, which reduces recovery time during turn off. This method of reducing recovery time is superior to conventional gold or platinum killing methods.
    [43] By having a higher doping level 12 as above for the intermediate drift region 3, the charge storage in the drift region 3 during the forward conduction is reduced because of the large amount of charge required to carry the current. Is obtained from the dopant atoms in the region 3 (rather than from injection with minority carriers from the region 5). This reduces the level of injected charge required for a given current. As such, the rate of reverse recovery is greatly increased without life killer centers such as gold and platinum doping. Thus, the high temperature dependence of the inflexibility recovery and switching properties associated with gold and platinum doping can overcome the disadvantages.
    [44] In addition, by using a higher doping level 12 for the region 3, it is possible to lower the transient voltage drop during turn on. During turn on, the voltage drop across the conventional P-i-N diode is typically greater than in the steady state. This is because the injected charge distribution has not yet been fully established in the middle region. The higher doping level 12 allowed by the present invention for the region 3 inherently supplies the charge carriers in the region 3, thereby lowering the pre-modulation resistance and reducing the voltage transients. This effect adds to the reduced reverse recovery time.
    [45] As such, the present invention yields advantageous results during both turn on and turn off periods.
    [46] The invention can be used as a rectifier to handle a wide range of voltages, for example from 100 volts to 600 volts. The diodes described above are particularly useful as diodes that handle voltages from about 200 volts to 300 volts.
    [47] In another embodiment of the present invention of FIG. 4, the p-type silicon epi layer 5 of the first embodiment is replaced with a thin layer 41 of different semiconductor material having a lower bandgap. In a particular embodiment, a thin (20 nm thick) silicon-germanium layer 41 having a mass of germanium of about 20% is used, but a silicon-germanium layer in which the germanium mass range is within 0-20% may also be used. The thickness of the thin silicon-germanium layer is chosen so as not to create dislocations in which the thickness is inadequate combined with the deviation of the lattice constants of the thin silicon-germanium layer and the silicon intermediate layer 3 and the substrate 1. In SiGe, if the product of the thickness of the thin SiGe layer 41 and the deviation of the lattice constants of the second SiGe semiconductor material and Si does not exceed 30 nm%, the inappropriate dislocation is not produced.
    [48] In the diode of FIG. 1, when the diode is turned on, the large amount of current through this diode is the hole current of the hole from the p-type silicon epi layer 5 injected into the n-type silicon epi layer 3. The contribution of electron current injected from the intermediate epi layer 3 to the p type epi layer 5 is generally very small, because the level of doping in the intermediate epi layer 3 is reduced in the p type epi layer 5 This is because it is generally smaller than the doping level. The injected hole is retained in the intermediate layer 3 for some time, but needs to be removed when the device is turned off. Removal of these holes takes considerable time.
    [49] In the structure of FIG. 4, the use of a thin layer 41 of different semiconductor material changes the ratio of hole current and electron current. Compared to the structure of FIG. 1, a larger fraction of the current through the diode will be carried by the electron current injected into the p-type SiGe layer in the n-type intermediate layer 3. As such, the number of holes injected into the intermediate layer in the p-type SiGe layer will be lower for the same on-state current. Reducing the number of holes injected into the intermediate layer reduces the number of holes present in the layer, reducing the time it takes to turn off the device.
    [50] The structure of FIG. 4 is particularly suitable for diodes having a blocking voltage higher than the blocking voltage of FIG. 1, for example a blocking voltage of about 600 volts from 200 to 300 volts. However, the use of a thin silicon-germanium layer is not limited to diodes of any particular blocking voltage, and may be used in diodes of any voltage required.
    [51] The use of thin silicon germanium layers was previously disclosed in WO99 / 53553 (Philips Reference PHN16848), where a conventional bipolar diode without field relief structure is the background. However, to reach a blocking voltage of 600 volts, WO99 / 53553 suggested that a recombination center known as a life killer needs to be added to the intermediate layer to reduce the hole concentration of the intermediate layer during forward operation. This creates difficulties in manufacturing and also creates ringing and other undesirable properties during turn off. The method according to the invention can be achieved for example with a suitable blocking voltage of 600 volts without the use of a life killer or with a concentration of a life killer lower than the concentration of the life killer required when not in accordance with the invention.
    [52] Those skilled in the art will understand that the invention is not limited only to the described embodiments. In particular, the above-described embodiment uses n type intermediate layer 3 on n + type substrate 1, but may also use p or n type intermediate layer 3 on p or n type substrate 1. Silicon and other semiconductor materials, such as silicon carbide, for example, can be used for the substrate 1 and the layers 2, 3. Different doping levels can be used.
    [53] In addition, although the material 13 filling the trench 7 in certain embodiments is doped polysilicon, those skilled in the art will appreciate that any other suitable conductor may be used.
    [54] The oxide layer 11 may be deposited rather than grown, and may even be replaced by another suitable insulating layer, such as a nitride layer or an oxynitride layer.
    [55] The first doped layer 1 may be an epi layer formed on the semiconductor substrate.
    [56] Top metallization 15 may be any suitable conductive material, such as aluminum, doped polysilicon or other metals or semiconductors.
    权利要求:
    Claims (10)
    [1" claim-type="Currently amended] In a semiconductor diode,
    A first doped region of a first conductivity type,
    An intermediate drift region of the first conductivity type doped with a dopant concentration less than the dopant concentration in the first region;
    A second doped region having a conductivity type opposite to the first conductivity type and sandwiching the intermediate drift region with the first region—the second doped region with the intermediate drift region and the first region Forming a bipolar diode structure
    A plurality of field electrodes depleting the intermediate drift region under reverse bias—the plurality of field electrodes extending transversely across the semiconductor diode and extending through the second region and the intermediate region Comprising in the closed spaced insulated trenches
    Semiconductor diode.
    [2" claim-type="Currently amended] The method of claim 1,
    The doping level of the intermediate drift region is within three times the minority carrier density injected into the intermediate drift region during normal use.
    Semiconductor diode.
    [3" claim-type="Currently amended] The method according to claim 1 or 2,
    The trench extends into the first region
    Semiconductor diode.
    [4" claim-type="Currently amended] The method according to any one of claims 1 to 3,
    The intermediate drift region is doped at a dopant concentration of 10 15 cm −3 to 10 17 cm −3
    Semiconductor diode.
    [5" claim-type="Currently amended] The method according to any one of claims 1 to 4,
    The intermediate drift region has a thickness of 5 μm to 40 μm.
    Semiconductor diode.
    [6" claim-type="Currently amended] The method according to any one of claims 1 to 5,
    The first doped region and the intermediate drift region are formed of a first semiconductor material, and the second doped region is formed of a second semiconductor material having a lower bandgap than the first semiconductor material, and the second region The thickness of and the degree of lattice mismatch of the first and second semiconductor materials are selected such that the level of mechanical stress is maintained at a level below that at which unsuitable dislocations are formed.
    Semiconductor diode.
    [7" claim-type="Currently amended] The method of claim 6,
    The product of the thickness of the second region and the relative deviation of the lattice constants of the first and second semiconductor materials does not exceed 30 nm%
    Semiconductor diode.
    [8" claim-type="Currently amended] The method according to any one of claims 1 to 7,
    The field electrode forming a grid extending across the semiconductor device
    Semiconductor diode.
    [9" claim-type="Currently amended] The method according to any one of claims 1 to 8,
    Metal wiring extending across the semiconductor device to contact the field electrode and the second doped region;
    Further comprising a back contact formed on an opposite surface of the semiconductor device to provide electrical connection to the first doped region
    Semiconductor diode.
    [10" claim-type="Currently amended] The method according to any one of claims 1 to 9,
    The intermediate drift region and the second doped region are epitaxial layers.
    Semiconductor diode.
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    同族专利:
    公开号 | 公开日
    EP1360727A1|2003-11-12|
    US20020121678A1|2002-09-05|
    JP2004519100A|2004-06-24|
    GB0102734D0|2001-03-21|
    WO2002063694A1|2002-08-15|
    US6674152B2|2004-01-06|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    法律状态:
    2001-02-03|Priority to GBGB0102734.1A
    2001-02-03|Priority to GB0102734.1
    2002-01-25|Application filed by 코닌클리즈케 필립스 일렉트로닉스 엔.브이.
    2002-01-25|Priority to PCT/IB2002/000217
    2002-12-11|Publication of KR20020092415A
    优先权:
    申请号 | 申请日 | 专利标题
    GBGB0102734.1A|GB0102734D0|2001-02-03|2001-02-03|Bipolar diode|
    GB0102734.1|2001-02-03|
    PCT/IB2002/000217|WO2002063694A1|2001-02-03|2002-01-25|Bipolar diode with a trench gate|
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